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SC18IM700

Master I2C-bus controller with UART interface

NXP Semiconductors. 

NXP Semiconductors

SC18IM700

Master I2C-bus controller with UART interface

S CHAR.

SLAVE ADR.

+W

NUMBER

OF BYTES

DATA 0

DATA N

S CHAR. SLAVE ADR. + R

NUMBER

OF BYTES

P CHAR.

18IM responds

DATA 0

DATA N

Fig 9. Repeated START: read after write

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7.1.8 Repeated START: write after write

The SC18IM700 also supports ‘write after write’ command as specified in the NXP

Semiconductors I2C-bus specification. This allows a write command to be sent after a

write command without having to issue a STOP condition between the two commands.

The host issues a write command as normal, then immediately issues a second write

command without sending a STOP (P) character after the first write command.

S CHAR.

SLAVE ADR.

+W

NUMBER

OF BYTES

DATA 0

DATA N

S CHAR. SLAVE ADR. + W

NUMBER

OF BYTES

DATA 0

Fig 10. Repeated START: write after write

DATA N P CHAR.

002aac055

7.1.9 Power-down mode

The SC18IM700 can be placed in a low-power mode. In this mode the internal oscillator is

stopped and SC18IM700 will no longer respond to the host messages. Enter the

Power-down mode by sending the power-down character Z (0x5A) followed by the two

defined bytes, which are 0x5A and followed by 0xA5. If the exact message is not received,

the device will not enter the power-down state.

Upon entering the power-down state, SC18IM700 places the WAKEUP pin in a HIGH

state. To have the device leave the power-down state, the WAKEUP pin should be

brought LOW. A 1 k resistor must be connected between the WAKEUP pin and VDD.

Z CHAR. 0x5A

Fig 11. Power-down mode

0xA5

P CHAR.

002aac056

SC18IM700_3

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 3 — 12 October 2017

© NXP Semiconductors N.V. 2017. All rights reserved.

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