SC18IM700 Ver la hoja de datos (PDF) - NXP Semiconductors.

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SC18IM700

Master I2C-bus controller with UART interface

NXP Semiconductors. 

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9. Internal registers available

9.1 Register summary

Table 5. Internal registers summary

Register

address

Register

Bit 7

Bit 6

General register set

0x00

BRG0

bit 7

bit 6

0x01

BRG1

bit 7

bit 6

0x02

PortConf1 GPIO3.1 GPIO3.0

0x03

PortConf2 GPIO7.1 GPIO7.0

0x04

IOState

GPIO7 GPIO6

0x05

reserved bit 7

bit 6

0x06

I2CAdr

bit 7

bit 6

0x07

I2CClkL

bit 7

bit 6

0x08

I2CClkH

bit 7

bit 6

0x09

I2CTO

TO7

TO6

0x0A

I2CStat

1

1

Bit 5

bit 5

bit 5

GPIO2.1

GPIO6.1

GPIO5

bit 5

bit 5

bit 5

bit 5

TO5

1

Bit 4

bit 4

bit 4

GPIO2.0

GPIO6.0

GPIO4

bit 4

bit 4

bit 4

bit 4

TO4

1

Bit 3

bit 3

bit 3

GPIO1.1

GPIO5.1

GPIO3

bit 3

bit 3

bit 3

bit 3

TO3

I2CStat[3]

Bit 2

bit 2

bit 2

GPIO1.0

GPIO5.0

GPIO2

bit 2

bit 2

bit 2

bit 2

TO2

I2CStat[2]

Bit 1

bit 1

bit 1

GPIO0.1

GPIO4.1

GPIO1

bit 1

bit 1

bit 1

bit 1

TO1

I2CStat[1]

Bit 0

bit 0

bit 0

GPIO0.0

GPIO4.0

GPIO0

bit 0

bit 0

bit 0

bit 0

TE

I2CStat[0]

R/W

R/W

R/W

R/W

R/W

R/W

-

R/W

R/W

R/W

R/W

R

Default

value

0xF0

0x02

0x55

0x55

-[1]

0x00

0x26

0x13

0x13

0x66

0xF0

[1] Since the GPIO pins are configured as inputs after reset, the default value of this register depends on the states of the GPIO pins.

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