AD8151 Ver la hoja de datos (PDF) - Analog Devices
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AD8151 Datasheet PDF : 40 Pages
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AD8151
CS INPUTS
UPDATE INPUTS
WE INPUTS
ENABLING
OUT[0:16][N:P]
OUTPUTS
INPUT {DATA 1}
INPUT {DATA 2}
DISABLING
OUT[0:16][N:P]
OUTPUTS
INPUT {DATA 0}
tCSU
tUOT
tUOE
INPUT {DATA 1}
tUW
tWOT
tWOD
tCHU
tWHU
Figure 29. First Rank Write Cycle and Second Rank Update Cycle
Table 8. First Rank Write Cycle and Second Rank Update Cycle
Parameter
Mnemonic Function
Setup Time
tCSU
Chip select to update
Hold Time
tCHU
Chip select from update
Output Enable Times
tUOE
Update to output enable
tWOE
Write enable to output enable
Output Toggle Times
tUOT
Update to output reprogram
Output Disable Times
tWOT
t1
UODD
Write enable to output reprogram
Update to output disabled
tWOD
Write enable to output disabled
Setup Time
tWHU
Write enable to update
Update Pulse
tUW
Width of update pulse
Conditions
TA = 25°C
VDD = 5 V
VCC = 3.3 V
1 Not shown.
CS INPUTS
Min Typ Max Unit
0
ns
0
ns
25 40 ns
25 40 ns
25 30 ns
25 30 ns
25 30 ns
25 30 ns
10
ns
15
ns
RE INPUTS
A[4:0]
INPUTS
ADDR 1
ADDR 2
D[6:0]
OUTPUTS
Table 9. Second Rank Readback Cycle
Parameter
Mnemonic
Setup Time
tCSR
Hold Time
tCHR
Read Enable
tRHA
Enable Time
tRDE
Access Time
tAA
Release Time
tRDD
tCSR tRDE
DATA
{ADDR 1}
tAA
DATA
{ADDR 2}
tRHA
tCHR
tRDD
Figure 30. Second Rank Readback Cycle
Function
Chip select to read enable
Chip select from read enable
Address from read enable
Data from read enable
Data from address
Data from read enable
Conditions
TA = 25°C
VDD = 5 V
VCC = 3.3 V
10 kΩ
20 pF on D[6:0]
Bus
Min Typ Max Unit
0
ns
0
ns
5
ns
15
ns
15
ns
15 30 ns
Rev. B | Page 15 of 40
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