ADP3161 Ver la hoja de datos (PDF) - Analog Devices
Número de pieza
componentes Descripción
Lista de partido
ADP3161 Datasheet PDF : 12 Pages
| |||
ADP3161
Parameter
Symbol Conditions
Min
SUPPLY
DC Supply Current
Normal Mode
UVLO Mode
UVLO Threshold Voltage
UVLO Hysteresis
ICC
ICC(UVLO)
VCC ≤ VUVLO, VCC Rising
VUVLO
5.9
0.1
NOTES
1All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods.
2Guaranteed by design, not tested in production.
Specifications subject to change without notice.
Typ
3.8
220
6.4
0.4
Max
5.5
400
6.9
0.6
Unit
mA
µA
V
V
ABSOLUTE MAXIMUM RATINGS*
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +15 V
CS+, CS– . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VCC + 0.3 V
All Other Inputs and Outputs . . . . . . . . . . . . –0.3 V to +10 V
Operating Ambient Temperature Range . . . . . . . 0°C to 70°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . 125°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
θJA
Two-Layer Board . . . . . . . . . . . . . . . . . . . . . . . . . . 125°C/W
Four-Layer Board . . . . . . . . . . . . . . . . . . . . . . . . . . 81°C/W
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . 300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
*This is a stress rating only; operation beyond these limits can cause the device to
be permanently damaged. Unless otherwise specified, all voltages are referenced
to GND.
ORDERING GUIDE
Model
Temperature Package
Range
Description
Package
Option
ADP3161JR 0°C to 70°C Narrow Body SOIC R-16A (SO-16)
PIN CONFIGURATION
R-16A
NC 1
16 VCC
VID3 2
15 REF
VID2 3
14 CS–
VID1 4 ADP3161 13 PWM1
VID0
5
TOP VIEW
(Not to Scale) 12
PWM2
COMP 6
11 CS+
FB 7
10 PWRGD
CT 8
9 GND
NC = NO CONNECT
PIN FUNCTION DESCRIPTIONS
Pin
No. Name
1 NC
2–5 VID3–
VID0
6 COMP
7 FB
8 CT
9 GND
10 PWRGD
11 CS+
12 PWM2
13 PWM1
14 CS–
15 REF
16 VCC
Function
No Connect.
Voltage Identification DAC Inputs.
These pins are pulled up to an internal refer-
ence, providing a Logic 1 if left open. The
DAC output programs the FB regulation
voltage from 1.3 V to 2.05 V.
Error Amplifier Output and Compensation
Point. The voltage at this output programs
the output current control level between
CS+ and CS–.
Feedback Input. Error amplifier input for
remote sensing of the output voltage.
External capacitor CT connection to ground
sets the frequency of the device.
Ground. All internal signals of the ADP3161
are referenced to this ground.
Open drain output that signals when the output
voltage is in the proper operating range.
Current Sense Positive Node. Positive input
for the current comparator. The output
current is sensed as a voltage at this pin with
respect to CS–.
Logic-level output for the phase 2 driver.
Logic-level output for the phase 1 driver.
Current Sense Negative Node. Negative
input for the current comparator.
3.0 V Reference Output.
Supply Voltage for the ADP3161.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADP3161 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. 0
–3–
Share Link: 