ADP3161 Ver la hoja de datos (PDF) - Analog Devices
Número de pieza
componentes Descripción
Lista de partido
ADP3161 Datasheet PDF : 12 Pages
| |||
ADP3161
The cumulative errors in the output voltage regulations cut into
the available regulation window, VWIN. When considering dynamic
load regulation this relates directly to the ESR. When consider-
ing dc load regulation, this relates directly to the programmed
output resistance of the power converter.
Some error sources, such as initial voltage accuracy and ripple
voltage, can be directly deducted from the available regulation
window, while other error sources scale proportionally to the
amount of voltage positioning used, which, for an optimal design,
should utilize the maximum that the regulation window will allow.
The error determination is a closed-loop calculation, but it can
be closely approximated. To maintain a conservative design while
avoiding an impractical design, various error sources should be
considered and summed statistically.
The output ripple voltage can be factored into the calculation by
summing the output ripple current with the maximum output
current to determine an effective maximum dynamic current
change. The remaining errors are summed separately according
to the formula:
VWIN = (V∆ – (VVID × 2 kVID )) ×
(3)
1 – IO
IO + IO∆
kRCS2
+
kCSF
2
2
+ kRT 2
+ kEA2
=
83.5 mV
where kVID = 0.7% is the initial programmed voltage tolerance
from the graph of TPC 4, kRCS = 2% is the tolerance of the
current sense resistor, kCSF = 20% is the summed tolerance of
the current sense filter components, kRT = 2% is the tolerance of
the two termination resistors added at the COMP pin, and kEA =
8% accounts for the IC current loop gain tolerance including
the gm tolerance.
The remaining window is then divided by the maximum output
current plus the ripple to determine the maximum allowed ESR
and output resistance:
RE ( MAX )
= ROUT ( MAX )
=
VWIN
IO + IO∆
=
83.5 mV
26 A + 2.6
A
= 2.9 mΩ
(4)
The output filter capacitor bank must have an ESR of less than
2.9 mΩ. One can, for example, use four SP-Type OS-CON
capacitors from Sanyo, with 1.2 mF capacitance, a 2.5 V voltage
rating, and 11 mΩ ESR. The four capacitors have a maximum
total ESR of 2.75 mΩ when connected in parallel. Another
possibility is the ZA series from Rubycon. The trade-off is
size versus cost. Nine 1 mF capacitors would give an ESR of
2.67 mΩ. These capacitors take up more space than four
OS-CON capacitors, but are significantly less expensive.
COUT—Checking the Capacitance
As long as the capacitance of the output capacitor is above a
critical value and the regulating loop is compensated with ADOPT,
the actual value has no influence on the peak-to-peak deviation
of the output voltage to a full step change in the load current.
The critical capacitance can be calculated as follows:
COUT (CRIT ) =
RE
IO
× VOUT
×L
2
=
26 A
× 1 µH = 2.6 mF
(5)
2.75 mΩ × 1.8 2
The critical capacitance for the four OS-CON capacitors with
an equivalent ESR of 2.75 mΩ is 2.6 mF, while the equivalent
capacitance of those capacitors is 4.8 mF. The critical capacitance
for the nine ZA series Rubycon capacitors is 2.8 mF while the
equivalent capacitance is 9 mF. With both choices, the capaci-
tance is safely above the critical value.
RSENSE
The value of RSENSE is based on the maximum required output
current. The current comparator of the ADP3161 has a mini-
mum current limit threshold of 69 mV. Note that the 69 mV
value cannot be used for the maximum specified nominal cur-
rent, as headroom is needed for ripple current and tolerances.
The current comparator threshold sets the peak of the inductor
current yielding a maximum output current, IO, which equals
twice the peak inductor current value less half of the peak-to-
peak inductor ripple current. From this the maximum value of
RSENSE is calculated as:
RSENSE
≤
VCS(CL )( MIN )
IO + IL(RIPPLE )
= 69 mV = 4.4 mΩ
13 A + 2.85 A
(6)
2
2
In this case, 4 mΩ was chosen as the closest standard value.
Once RSENSE has been chosen, the output current at the point
where current limit is reached, IOUT(CL), can be calculated using
the maximum current sense threshold of 89 mV:
IOUT (CL )
= 2 × VCS(CL )( MAX )
RSENSE
– IL(RIPPLE )
= 2 × 89 mV – 5.7 A = 38.8 A
(7)
4 mΩ
At output voltages below 425 mV, the current sense threshold is
reduced to 58 mV, and the ripple current is negligible. There-
fore, at dead short the output current is reduced to:
IOUT (SC )
= 2 × 58 mV
4 mV
= 29.0 A
(8)
To safely carry the current under maximum load conditions, the
sense resistor must have a power rating of at least:
P = I × R RSENSE
2
SENSE (RMS )
SENSE
(9)
where:
I2
SENSE (RMS )
=
IO 2
n
×
VOUT
η ×VIN
(10)
In this formula, n is the number of phases, and η is the con-
verter efficiency, in this case assumed to be 85%. Combining
Equations 9 and 10 yields:
PRSENSE
= 26 A 2 × 1.8V
2 0.85 × 5V
= 573 mW
Power MOSFETs
In the standard two-phase application, two pairs of N-channel
power MOSFETs must be used with the ADP3161 and ADP3412,
one pair as the main (control) switches, and the other pair as
the synchronous rectifier switches. The main selection parameters
–8–
REV. 0
Share Link: 