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HIP6020

Advanced Dual PWM and Dual Linear Power Controller

Intersil 

HIP6020

increases the peak surge current. The peak surge current

occurs during the initial output voltage rise to 70% of the set

value. Using the recommended 0.1µF soft start capacitor

insures all output voltages ramp up to their set values within

10ms of the input voltages reaching POR levels.

Shutdown

Neither PWM output switches until the soft-start voltage

(VSS) exceeds the oscillator’s valley voltage. Additionally, the

reference on each linear’s amplifier is clamped to the soft-

start voltage. Holding the SS pin low (with an open drain or

open collector signal) turns off all four regulators.

The ‘11111’ VID code, also shuts down the IC.

Layout Considerations

MOSFETs switch very fast and efficiently. The speed with

which the current transitions from one device to another

causes voltage spikes across the interconnecting

impedances and parasitic circuit elements. The voltage

spikes can degrade efficiency, radiate noise into the circuit,

and lead to device over-voltage stress. Careful component

layout and printed circuit design minimizes the voltage

spikes in the converter. Consider, as an example, the turn-off

transition of the upper MOSFET. Prior to turn-off, the upper

MOSFET was carrying the full load current. During the turn-

off, current stops flowing in the upper MOSFET and is picked

up by the lower MOSFET or Schottky diode. Any inductance

in the switched current path generates a large voltage spike

during the switching interval. Careful component selection,

tight layout of the critical components, and short, wide circuit

traces minimize the magnitude of voltage spikes.

There are two sets of critical components in a DC-DC

converter using a HIP6020 controller. The switching power

components are the most critical because they switch large

amounts of energy, and as such, they tend to generate

equally large amounts of noise. The critical small signal

components are those connected to sensitive nodes or

those supplying critical bypass current.

The power components and the controller IC should be

placed first. Locate the input capacitors, especially the high-

frequency ceramic de-coupling capacitors, close to the

power switches. Locate the output inductor and output

capacitors between the MOSFETs and the load. Locate the

PWM controller close to the MOSFETs.

The critical small signal components include the bypass

capacitor for VCC and the soft-start capacitor, CSS. Locate

these components close to their connecting pins on the

control IC. Minimize any leakage current paths from SS

node, since the internal current source is only 28µA.

A multi-layer printed circuit board is recommended. Figure

10 shows the connections of the critical components in the

converter. Note that the capacitors CIN and COUT each

could represent numerous physical capacitors. Dedicate one

solid layer for a ground plane and make all critical

2-290

component ground connections with vias to this layer.

Dedicate another solid layer as a power plane and break this

plane into smaller islands of common voltage levels. The

power plane should support the input power and output

power nodes. Use copper filled polygons on the top and

bottom circuit layers for the PHASE nodes, but do not

unnecessarily oversize these particular islands. Since the

PHASE nodes are subjected to very high dV/dt voltages, the

stray capacitor formed between these islands and the

surrounding circuitry will tend to couple switching noise. Use

the remaining printed circuit layers for small signal wiring.

The wiring traces from the control IC to the MOSFET gate

and source should be sized to carry 2A peak currents.

+5VIN

LIN

CIN

+12V

VOUT2

COCSET2 CVCC

ROCSET2

VCC GND

OCSET2 OCSET1

Q3

LOUT2

COUT2 CR2

UGATE2

UGATE1

PHASE2

PHASE1

COCSET1

ROCSET1

Q1

LOUT1

VOUT1

LGATE1

SS

Q2

COUT1

CR1

VOUT3

CSS

HIP6020

VOUT4

COUT3

Q4

DRIVE3 DRIVE4

PGND

COUT4

Q5

+3.3VIN

KEY

ISLAND ON POWER PLANE LAYER

ISLAND ON CIRCUIT PLANE LAYER

VIA CONNECTION TO GROUND PLANE

FIGURE 7. PRINTED CIRCUIT BOARD POWER PLANES AND

ISLANDS

PWM1 Controller Feedback Compensation

Both PWM controllers use voltage-mode control for output

regulation. This section highlights the design consideration

for a voltage-mode controller requiring external

compensation. Apply these methods and considerations

only to the synchronous PWM controller. The considerations

for the standard PWM controller are presented separately.

Figure 11 highlights the voltage-mode control loop for a

synchronous-rectified buck converter. The output voltage

(VOUT) is regulated to the Reference voltage level. The

reference voltage level is the DAC output voltage (DACOUT) for

PWM1. The error amplifier output (VE/A) is compared with the

oscillator (OSC) triangular wave to provide a pulse-width

modulated wave with an amplitude of VIN at the PHASE node.

The PWM wave is smoothed by the output filter (LO and CO).

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