MPC92432 Ver la hoja de datos (PDF) - Motorola => Freescale

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MPC92432

1360 MHz Dual Output LVPECL Clock Synthesizer

Motorola => Freescale 

Freescale Semiconductor, Inc.

MPC92432

Table 1. Signal Configuration

Pin

XTAL1, XTAL2

REF_CLK

REF_SEL

QA

QB

LOCK

M[9:0]

NA[2:0]

NB

P

P_LOAD

SDA

SCL

ADR[1:0]

BYPASS

TEST_EN

I/O

Input

Input

Input

Output

Output

Output

Input

Input

Input

Input

Input

I/O

Input

Input

Input

Input

Type

Analog

LVCMOS

LVCMOS

Differential LVPECL

Differential LVPECL

LVCMOS

LVCMOS

LVCMOS

LVCMOS

LVCMOS

LVCMOS

LVCMOS

LVCMOS

LVCMOS

LVCMOS

LVCMOS

CLK_STOPx

MR

GND

VCC_PLL

Input

Input

Supply

Supply

LVCMOS

LVCMOS

Ground

VCC

VCC

Supply

VCC

Function

Crystal oscillator interface

PLL external reference input

Selects the reference clock input

High frequency clock output

High frequency clock output

PLL lock indicator

PLL feedback divider configuration

PLL post-divider configuration for output QA

PLL post-divider configuration for output QB

PLL pre-divider configuration

Selects the programming interface

I2C data

I2C clock

Selectable two bits of the I2C slave address

Selects the static circuit bypass mode

Factory test mode enable. This input must be set to logic low level in all applications

of the device.

Output Qx disable in logic low state

Device master reset

Negative power supply

Positive power supply for the PLL (analog power supply). It is recommended to use

an external RC filter for the analog power supply pin VCC_PLL.

Positive power supply for I/O and core

TIMING SOLUTIONS

3

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