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MTD800

Integrated Fast Ethernet Controller

Myson Century Inc 

MYSON

TECHNOLOGY

MTD 800

(Preliminary)

Bit

5

4-2

1-0

7

6

5

4

3

2

1

0

7-2

1

0

Symbol

TFCEN

BRSZ[2:0]

BRSPD[1:0]

RFCEN

PME

PSD3c

PSD1

WPP

-

MPE

STSCHG

-

WPPN

-

Description

Transmit Flow Control packet Enable. Corresponding to Bit 8 of TCR

Indicates the Boot ROM size. Corresponding to Bit 28 -26 of BROM_CR.

Boot ROM Speed Select. Corresponding to Bit 25 - 24 of BROM_CR.

Configuration Register 1

Receive Flow Control packet Enable. Corresponding to Bit 13 of RCR.

PME_Enable. When set, indicates that the chip can assert wake-up event

pin. Corresponding to Bit 8 of CFPMR.

PME Support D3cold. Corresponding to Bit 31 of CFPMR.

PME Support D1. Corresponding to Bit 28 of CFPMR.

Wake-up pin property. When set, the wake-up pin is asserted high, while

cleared, the wake-up pin is asserted low.

Reserved.

Magic Packet Enable. Corresponding to Bit 1 of WUECSR.

Status Change Enable. When set, the STSCHG pin is active, otherwise it

acts as a wake-up pin.

Configuration Register 2

Reserved.

Wake-up pin pattern. When set, the wake-up output pin is a level signal,

while cleared, the wake-up output pin is a pulse signal with the width of

160ms.

Reserved.

3.5.2 Direct Programming of EEPROM

The MTD800 features a easy way to program external EEPROM in-suit. When the RESET is active and if the

upper byte of 00H on EEPROM is not 73H, the SROMPS bit in CSR40 register will be cleared to indicate that

the current EEPROM has not been programmed yet. This allows the MTD800 to enter into Direct Program-

ming mode if DPM bit is also set. In this mode the user can directly control the EEPROM interface signals by

writing to the SROM_CR Port and the value on the EECS, ESK and EDI bits will be driven onto the ECS,

EECLK( BRD2) and EEDI( BRD0) outputs respectively. These outputs will be latched so the user can gener-

ate a clock on EECLK by repetitively writing 1 then 0 to the appropriate bit. This can be used to generate the

EEPROM signals as per the 93C46 or 93C66 data sheet.

To read out the EEPROM data, users have to generate EEPROM interface signals into ECS, EECLK and

EEDI as described above and in the mean time read the data from EEDO( BRD1 ) input via pin BRD1/EEDO.

Reading Data Transfer Port during programming will not affect the latched data on ECS, EECLK and EEDI

outputs. When the EEPROM has been programmed and verified ( remember to program the upper byte of

00H with 73H), the user can give MTD800 a power-on reset to return to normal operation or set AUTOLD bit

to read in the new data.

The Direct Programming mode is mainly used for production to program every bit of the blank EEPROM. The

MTD800 also provides a flexible feature to allow the driver to reprogram the content of EEPROM, even the

EEPROM has already been programmed.

3.5.3 BootROM Interface and Operation

13/42

MTD800 Revision 0.0 07/20/1999

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