datasheetbank_Logo
búsqueda de Hoja de datos y gratuito Fichas de descarga

MTD800 Ver la hoja de datos (PDF) - Myson Century Inc

Número de pieza
componentes Descripción
Lista de partido
MTD800
Myson
Myson Century Inc Myson
MTD800 Datasheet PDF : 42 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
MYSON
TECHNOLOGY
MTD 800
(Preliminary)
The MTD800 offers the address , data and control signals which can directly connected to BootROM without
external logic on board. The BootROM size and speed can be configured beforehand and stored in the EEP-
ROM. The access time ranges from 120ns to 300ns and the size achieves to 128KBytes at a maximum are
all feasible to the MTD800. During machine boot, the system software identifies bootable devices by search-
ing a specific signature (55AA) in BootROM. Once found, the system copies the code from the BootROM to a
shadow RAM in the host memory and executes the code from the RAM.
3.6 Wake-up Frame Controller and ACPI
The MTD800 is compliant to ACPI specification by providing D0/D1/D3cold power states and a wake-up
mechanism to transit from lower power state to higher power state. When the MTD800 enters into D1 power
down state, only the PCI configuration registers can be accessed and other circuits except MAC and wake-up
controller are all disabled to save power. The most saving power state is under the D3cold condition. In this
state, all power to the PCI interface is cut off and the PCI clock is stopped, and requires an auxiliary power
source to maintain MAC and wake-up controller to work normally. Once the MTD800 receives a wake-up
packet, the chip will issue a PME# interrupt to notify system to be back to the D0 state or assert WAKEUP sig-
nal to ATX power PS-ON(refer to ATX specification v2.01) or mother board’s wake up interrupt line like ring-in
to power on the whole system.
The wake-up frame controller supports the capabilities of recognizing AMD Magic packet frame and Microsoft
OnNow Network Device wake-up frames. The Magic Packet is defined by the AMD for using to wake up the
system during the powerdown session. This packet contains a special pattern which is composed by 16 dupli-
cations of Wake-up LAN address. In general, the address is the IEEE address of this node. This pattern can
be located anywhere within the packet, but must be preceded by a synchronization stream which is defined as
6 bytes of FFH. Meanwhile, A network wake-up frame is typically a frame that is sent by existing network pro-
tocols. There are ARP request frame, unicast IP frame, direct IPX frame, NETBIOS name-lookup frame and
so on. Each protocol has its own signature pattern. A network frame filter is designed to check the received
frame if the signature pattern is embedded or not. The filter is parameterized with the byte offset, byte mask,
CRC-16 and filtering commands. The MTD800 supports two such filters which are defined in the command
and status registers ( i.e., CSR4C, CSR50, CSR54 and CSR58 ).
4.0 REGISTERS DESCRIPTION
4.1 PCI Configuration Space
The operation of PCI configuration enables a full software-driven initialization and configuration. This permits
the software to identify and query the MTD800. For keeping the contents of configuration registers intact after
power-up, a software reset has no effect on them. There are total 15 long-word configuration registers. Of the
configuration registers, 13 are standard registers that are defined in the PCI Local Bus Specification, while the
other 2 are MTD800-specific registers. Following is the structure of configuration registers.
14/42
MTD800 Revision 0.0 07/20/1999

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]