GENERAL DESCRIPTION
The Am29DL800B is an 8 Mbit, 3.0 volt-only flash memory device, organized as 524,288 words or 1,048,576 bytes. The device is offered in 44-pin SO, 48-pin TSOP, and 48-ball FBGA packages. The word wide (x16) data appears on DQ0–DQ15; the byte-wide (x8) data appears on DQ0–DQ7. This device requires only a single 3.0 volt VCC supply to perform read, program, and erase operations. A standard EPROM programmer can also be used to program and erase the device.

DISTINCTIVE CHARACTERISTICS
■ Simultaneous Read/Write operations
    — Host system can program or erase in one bank, then immediately and simultaneously read from the other bank — Zero latency between read and write operations
    — Read-while-erase
    — Read-while-program
■ Single power supply operation
    — Full voltage range: 2.7 to 3.6 volt read and write operations for battery-powered applications
■ Manufactured on 0.35 µm process technology
    — Compatible with 0.5 µm Am29DL800 device
■ High performance
    — Access times as fast as 70 ns
■ Low current consumption (typical values at 5 MHz)
    — 7 mA active read current
    — 21 mA active read-while-program or read-whileerase current
    — 17 mA active program-while-erase-suspended current
    — 200 nA in standby mode
    — 200 nA in automatic sleep mode
    — Standard tCE chip enable access time applies to transition from automatic sleep mode to active mode
■ Flexible sector architecture
    — Two 16 Kword, two 8 Kword, four 4 Kword, and fourteen 32 Kword sectors in word mode
    — Two 32 Kbyte, two 16 Kbyte, four 8 Kbyte, and fourteen 64 Kbyte sectors in byte mode
    — Any combination of sectors can be erased
    — Supports full chip erase
■ Unlock Bypass Program Command
    — Reduces overall programming time when issuing multiple program command sequences
■ Sector protection
    — Hardware method of locking a sector to prevent any program or erase operation within that sector
    — Sectors can be locked in-system or via programming equipment
    — Temporary Sector Unprotect feature allows code changes in previously locked sectors
■ Top or bottom boot block configurations available
■ Embedded Algorithms
    — Embedded Erase algorithm automatically pre-programs and erases sectors or entire chip
    — Embedded Program algorithm automatically programs and verifies data at specified address
■ Minimum 1,000,000 program/erase cycles guaranteed per sector
■ Package options
    — 44-pin SO
    — 48-pin TSOP
    — 48-ball FBGA
■ Compatible with JEDEC standards
    — Pinout and software compatible with single-power-supply flash standard
    — Superior inadvertent write protection
■ Data# Polling and Toggle Bits
    — Provides a software method of detecting program or erase cycle completion
■ Ready/Busy# output (RY/BY#)
    — Hardware method for detecting program or erase cycle completion
■ Erase Suspend/Erase Resume
    — Suspends or resumes erasing sectors to allow reading and programming in other sectors
    — No need to suspend if sector is in the other bank
■ Hardware reset pin (RESET#)
    — Hardware method of resetting the device to reading array data