GENERAL DESCRIPTION
The Am29DL400B is an 4 Mbit, 3.0 volt-only flash memory device, organized as 262,144 words or 524,288 bytes. The device is offered in 44-pin SO and 48-pin TSOP packages. The word-wide (x16) data appears on DQ0–DQ15; the byte-wide (x8) data appears on DQ0–DQ7. This device requires only a single 3.0 volt VCCsupply to perform read, program, and erase operations. A standard EPROM programmer can also be used to program and erase the device.

DISTINCTIVE CHARACTERISTICS
■Simultaneous Read/Write operations
— Host system can program or erase in one bank, then immediately and simultaneously read from the other bank
— Zero latency between read and write operations
— Read-while-erase
— Read-while-program
■Single power supply operation
— 2.7 to 3.6 volt read and write operations for battery-powered applications
■Manufactured on 0.32 µm process technology
■High performance
— Access times as fast as 70 ns
■Low current consumption (typical values at 5 MHz)
— 7 mA active read current
— 21 mA active read-while-program or read while-erase current
— 17 mA active program-while-erase-suspended current
— 200 nA in standby mode
— 200 nA in automatic sleep mode
—Standard tCE chip enable access time applies to transition from automatic sleep mode to active mode
■Flexible sector architecture
— Two 16 Kword, two 8 Kword, four 4 Kword, and six 32 Kword sectors in word mode
— Two 32 Kbyte, two 16 Kbyte, four 8 Kbyte, and six 64 Kbyte sectors in byte mode
— Any combination of sectors can be erased
— Supports full chip erase
■Unlock Bypass Program Command
— Reduces overall programming time when issuing multiple program command sequences
■Sector protection
— Hardware method of locking a sector to prevent any program or erase operation within that sector
— Sectors can be locked in-system or via programming equipment
— Temporary Sector Unprotect feature allows code changes in previously locked sectors
■Top or bottom boot block configurations available
■Embedded Algorithms
— Embedded Erase algorithm automatically pre-programs and erases sectors or entire chip
— Embedded Program algorithm automatically programs and verifies data at specified address
■Minimum 1 million program/erase cycles guaranteed per sector
■20-year data retention at 125°C
— Reliable operation for the life of the system
■Package options
— 44-pin SO
— 48-pin TSOP
■Compatible with JEDEC standards
— Pinout and software compatible with single-power-supply flash standard
— Superior inadvertent write protection
■Data# Polling and Toggle Bits
— Provides a software method of detecting program or erase cycle completion
■Ready/Busy# output (RY/BY#)
— Hardware method for detecting program or erase cycle completion
■Erase Suspend/Erase Resume
— Suspends or resumes erasing sectors to allow reading and programming in other sectors
— No need to suspend if sector is in the other bank
■Hardware reset pin (RESET#)
— Hardware method of resetting the device to reading array data