MX98728EC Ver la hoja de datos (PDF) - Macronix International

Número de pieza

componentes Descripción

Lista de partido

MX98728EC

GMAC SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER FOR GENERIC APPLICATION

Macronix International 

MX98728EC

2.1 Pin Description: ( all internal pull-up is 168K ohm, pull-down is 70K ohm )

Host Bus Interface

PIN#

143

19-12,

101-103,

105-106,

108-114,

122-125,

92-97,

99, 100

117-120,

126-129,

131-133,

136,138-140

126

Pin Name

CLKIN

D[31:0]

A[15:1]

A11(RXC)

Type

I, TTL

I/O, 4ma

I, 4ma

I, TTL

127

A10(RXDV) I,TTL

128

A9(CRS)

I,TTL

129

A8(COL)

I,TTL

141

NC

137

SRDY

O, 4ma

Description

Not used, NC pin.

Host Data Bit [31:0]:

Host Bus Address Bit [15:1] : In 32 bit mode, H16_32=0,

all host accesses are 32 bit wide. When H16_32=1, all

host accesses are 16 bit wide. (Internal pull-up).

A11, A10, A9, A8 has other definition in MII mode.

Host Bus Address Bit11, when on-chip tranceiver is used,

it is used in A[15:1], when in MII mode, it is defined as

receive clock RXC (25MHz or 2.5MHz) When this pin is

used as address bit, it is internally grounded until Reg50.6

(A11A8EN bit) is set to enable decoding of this pin as

address bit.

Host Bus Address Bit10, when on-chip tranceiver is used,

it is used in A[15:1], when in MII mode, it is defined as

receive data valid RXDV signal. When this pin is

used as address bit, it is internally grounded until Reg50.6

(A11A8EN bit) is set to enable decoding of this pin as

address bit.

Host Bus Address Bit9, when on-chip tranceiver is used,

it is used in A[15:1], when in MII mode, it is defined as

carrier same CRS signal. When this pin is

used as address bit, it is internally grounded until Reg50.6

(A11A8EN bit) is set to enable decoding of this pin as

address bit.

Host Bus Address Bit8, when on-chip tranceiver is used,

it is used in A[15:1], when in MII mode, it is defined as

collision COL signal. When this pin is used as address

bit, it is internally grounded until Reg50.6 (A11A8EN bit)

is set to enable decoding of this pin as address bit.

NC pin : Not connected.

Synchronous Ready : Active high for the write cycle to

indicate the data is secured and the cycle can be fin-

ished.

P/N:PM0723

REV. 1.0, JUL. 13, 2000

5

Share Link: