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MX98728EC Ver la hoja de datos (PDF) - Macronix International

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componentes Descripción
Lista de partido
MX98728EC Datasheet PDF : 71 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
MX98728EC
23
21
11-8,
6-3,
1,
160, 159,
157-155,
152,151
148
147
150,149
MA1(EEDI)
MA0(EECK)
MD[15:0]
MOEB
MCSB
MWEB[1:0]
I/O,4ma
I/O,4ma
I/O,4ma
Memory Address Bit 1 or EEPROM Data In bit: During the
EEPROM auto load sequence, the MA1 pin acts as the EEDI
pin that writes the data stream into the EEPROM. After the
EEPROM auto load sequence is done, this pin becomes MA1.
Together with MA[19:2], they form the packet buffer address
lines.
Memory Address Bit 0 or EEPROM Clock Input : During the
EEPROM auto load sequence, MA0 pin acts as the EECK pin
that provides clock to the EEPROM. After the EEPROM autoload
sequence is done, this pin becomes MA0. Together with MA[19:1],
they form the packet buffer address lines. MA0 is don't care
when packet memory is in word mode.
Packet Memory Data Bits 15-0: (Internal pull-down)
O,4ma
O,4ma
O,4ma
Memory Output Enable: Active low during packet buffer read
accesses.
Memory Chip Select: Active low during packet buffer accesses.
Byte Write Enable: Active low during the packet buffer write cycle.
MWEB1 for the high byte and MWEB0 for the low byte.
10/100 Transceiver interface
PAD#
53
56
55
64
Pin Name
RDA
CKREF(X1)
X2
RXIN
Type
O
I,TTL
O
I
65
RXIP
I
71
TXON
O
72
TXOP
O
75
CPK
O
76
RTX2EQ
O
77
RTX
O
P/N:PM0723
Description
RDA external resistor to ground: 10K ohm, 5%
25Mhz , 30 PPM external osc./crystal input :
25Mhz , 30 PPM external crystal output :
Twisted pair receive differential input: supports both 10/100 Mbps
speeds.
Twisted pair receive differential input: supports both 10/100 Mbps
speeds.
Twisted pair transmit differential output: supports both 10/100 Mbps
speeds, 802.3 AOI spec.
Twisted pair transmit differential output: supports both 10/100 Mbps
speeds, 802.3 AOI spec.
NC pin : used in the test mode only.
RTX2EQ external resistor to ground: 1.4K ohm, 5%
RTX external resistor to ground: 560 ohm, 5%
REV. 1.0, JUL. 13, 2000
7

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