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MX98728EC

GMAC SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER FOR GENERIC APPLICATION

Macronix International 

MX98728EC

Miscellaneous

PIN#

20

87

145

144

47-50

Pin Name

EECS

C46/C66

Type

O,2ma

I,TTL

LED0(TXC) I/O,16ma

LED1(TXEN) O,16ma

TXD[3:0]

O, 4ma

Description

EEPROM Chip Select Signal

EEPROM Size Select : 1 for C46, 0 for C66. Default is 1.(Internal pull-

up)

LED0 (TXC in MII mode) : When on-chip tranceiver is used, it is defined

as SPEED LED. When the light is on, it indicates the 100 Mbps speed.

When off, it indicates the 10 Mbps speed. When both LED0 and LED1

are flashing identically, it means the bus integrity error. (Internal pull-

up). When in MII mode, this pin is defined as transmit clock TXC (25

MHz or 2.5 MHz) input.

LED1 (TXEN in MII mode) :When on-chip tranceiver is used, it is de-

fined as Link/Activity LED. When the light is stable and on, it indicates

a good link. When flashing, it indicates TX and RX activities. When off,

it means a bad link. (Internal pull-up). When in MII mode, this pin is

defined as transmit enable TXEN pin.

MII Test port TXD[3:0] : Used only in the test mode as part of the MII

interface. (Internal pull-down)

VDD/GND Pins

PIN#

51,54,59,70,78,81,83

Pin Name

VDDA

52,57,58,73,74,79,80,

82,84

62,63,66,67

GNDA

VDDR

60,61,68,69

GNDR

42,30,2,153,115,107

158

41,39,34,22,7,154,

146,121,116,104,98,

85

VDD

GND

GND(MDIO)

86

GND(MDC)

Type

I/O, 4ma

I/O, 4ma

Description

Analog Vdd Pins : Must be carefully isolated in the

separated Vdd plane.

Analog Ground Pins : Must be carefully isolated in the

seperated GND plane.

RX Vdd Pins : Must be carefully isolated in the separated

Vdd plane.

RX Ground Pins : Must be carefully isolated in the

separated ground plane.

Digital Vdd Pins : Must be carefully isolated in the

separated Vdd plane.

Digital Ground Pins : Must be carefully isolated in the

separated ground plane.

Normally grounded when on-chip tranceiver is used, while

in MII mode, it is defined as MDIO pin.

Normally grounded when on-chip tranceiver is used, while

in MII mode, it is defined as MDC clock pin.

P/N:PM0723

REV. 1.0, JUL. 13, 2000

8

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