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DM9102A

Single Chip Fast Ethernet NIC controller

Unspecified 

DM9102A

Single Chip Fast Ethernet NIC controller

Power Management Control/Status (xxxxxx54h~PMCSR)

31

16 15 14

987

2 10

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R/W 0 0 0 0 0 0 R/W 0 0 0 0 0 0 R/W

PME_Status

PME_En

Power_State

Bit

31:16

15

14:9

8

7:2

1:0

Default

0000h

0

000000

1

000000

00

Type

RO

RW/C

RO

RW

RO

RW

Description

Reserved

PME_Status

This bit is set when the function would normally assert the PME# signal

independent of the state of the PME_En bit. Writing a “1” to this bit will clear it.

This bit defaults to “0” if the function does not support PME# generation from

D3(cold).If the function supports PME# from D3(cold) then this bit is sticky and

must be explicitly cleared by the operating system each time the operating

system is initially loaded.

Reserved.

It means that the DM9102A does not support reporting power consumption.

PME_En

Write “1” to enables the function to assert PME#, write “0” to disable PME#

assertion.

This bit defaults to “0” if the function does not support PME# generation from

D3(cold).

If the function supports PME# from D3(cold) then this bit is sticky and must be

explicitly cleared by the operating system each time the operating system is

initially loaded.

Reserved

This two bits field is both used to determine the current power state of a function

and to set the function into a new power state. The definitions given below.

00 : D0

11 : D3(hot)

24

Final

Version: DM9102A-DS-F03

August 28, 2000

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