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DM9000

ISA to Ethernet MAC Controller with Integrated 10/100 PHY

Davicom Semiconductor, Inc. 

DM9000

ISA to Ethernet MAC Controller with Integrated 10/100 PHY

6. Vendor Control and Status Register Set

The DM9000 implements several control and status

registers, which can be accessed by the host. These CSRs

are byte aligned. All CSRs are set to their default values by

hardware or software reset unless they are specified

Register

Description

Offset

NCR

NSR

TCR

TSR I

TSR II

RCR

RSR

ROCR

BPTR

FCTR

FCR

EPCR

EPAR

EPDRL

EPDRH

WCR

PAR

Network Control Register

Network Status Register

TX Control Register

TX Status Register I

TX Status Register II

RX Control Register

RX Status Register

Receive Overflow Counter Register

Back Pressure Threshold Register

Flow Control Threshold Register

RX Flow Control Register

EEPROM & PHY Control Register

EEPROM & PHY Address Register

EEPROM & PHY Low Byte Data Register

EEPROM & PHY High Byte Data Register

Wake Up Control Register

Physical Address Register

00H

01H

02H

03H

04H

05H

06H

07H

08H

09H

0AH

0BH

0CH

0DH

0EH

0FH

10H-15H

MAR

GPCR

GPR

TRPAL

TRPAH

RWPAL

RWPAH

VID

PID

CHIPR

SMCR

MRCMDX

MRCMD

MRRL

MRRH

MWCMDX

MWCMD

MWRL

Multicast Address Register

General Purpose Control Register

General Purpose Register

TX SRAM Read Pointer Address Low Byte

TX SRAM Read Pointer Address High Byte

RX SRAM Write Pointer Address Low Byte

RX SRAM Write Pointer Address High Byte

Vendor ID

Product ID

CHIP Revision

Special Mode Control Register

Memory Data Read Command Without Address Increment

Register

Memory Data Read Command With Address Increment

Register

Memory Data Read_ address Register Low Byte

Memory Data Read_ address Register High Byte

Memory Data Write Command Without Address Increment

Register

Memory Data Write Command With Address Increment

Register

Memory Data Write_ address Register Low Byte

16H-1DH

1EH

1FH

22H

23H

24H

25H

28H-29H

2AH-2BH

2CH

2FH

F0H

F2H

F4H

F5H

F6H

F8H

FAH

Final

Version: DM9000-DS-F03

April 23, 2009

Default value

after reset

00H

00H

00H

00H

00H

00H

00H

00H

37H

38H

00H

00H

40H

XXH

XXH

00H

Determined by

EEPROM

XXH

01H

XXH

00H

00H

04H

0CH

0A46H

9000H

00H

00H

XXH

XXH

00H

00H

XXH

XXH

00H

11

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