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LAN91C110

FEAST Fast Ethernet Controller for PCMCIA and Generic 16-Bit Applications

SMSC -> Microchip 

FEAST Fast Ethernet Controller for PCMCIA and Generic 16-Bit Applications

Datasheet

Chapter 5 Data Structures and Registers

5.1

Packet Format in Buffer Memory

The packet format in memory is similar for the Transmit and Receive areas. The first word is reserved for the

status word. The next word is used to specify the total number of bytes, and it is followed by the data area.

The data area holds the packet itself.

RAM

bit15

OFFSET

2nd Byte

(DECIMAL)

0

2

RESERVED

4

bit0

1st Byte

STATUS WORD

BYTE COUNT (always even)

DATA AREA

2046 Max

CONTROL BYTE

Last Byte

LAST DATA BYTE (if odd)

Figure 5.1 – Data Packet Format

STATUS WORD

BYTE COUNT

DATA AREA

CONTROL BYTE

TRANSMIT PACKET

Written by CSMA upon transmit

completion (see Status Register)

Written by CPU

Written/modified by CPU

Written by CPU to control

odd/even data bytes

RECEIVE PACKET

Written by CSMA upon receive

completion (see RX Frame

Status Word)

Written by CSMA

Written by CSMA

Written by CSMA; also has

odd/even bit

BYTE COUNT - Divided by two, it defines the total number of words including the STATUS WORD, the BYTE

COUNT WORD, the DATA AREA and the CONTROL BYTE.

SMSC LAN91C110 Rev. B

Page 15

DATASHEET

Revision 1.0 (11-04-08)

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