LAN91C110 Ver la hoja de datos (PDF) - SMSC -> Microchip
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LAN91C110 Datasheet PDF : 56 Pages
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FEAST Fast Ethernet Controller for PCMCIA and Generic 16-Bit Applications
Datasheet
Regardless of the functional description, all registers can be accessed as doublewords, words or bytes.
The default bit values upon hard reset are highlighted below each register.
Table 5.1 - Internal I/O Space Mapping
BANK0
0
TCR
2 EPH STATUS
4
RCR
6
COUNTER
8
MIR
A
MCR
C RESERVED (0)
E BANK SELECT
BANK1
CONFIG
BASE
IA0-1
IA2-3
IA4-5
-
CONTROL
BANK SELECT
BANK2
MMU COMMAND
PNR
FIFO PORTS
POINTER
DATA
DATA
INTERRUPT
BANK SELECT
BANK3
MT0-1
MT2-3
MT4-5
MT6-7
MGMT
REVISION
RCV
BANK SELECT
A special BANK (BANK7) exists to support the addition of external registers.
BANK SELECT REGISTER
OFFSET
E
NAME
BANK SELECT
REGISTER
TYPE
READ/WRITE
SYMBOL
BSR
HIGH
0
0
1
1
0
0
1
1
BYTE
0
0
1
1
0
0
1
1
LOW
BYTE
BS2
BS1
BS0
X
X
X
X
X
0
0
0
BS2, BS1, BS0 Determine the bank presently in use. This register is always accessible and is used to select the
register bank in use.
The upper byte always reads as 33h and can be used to help determine the I/O location of the LAN91C110.
The BANK SELECT REGISTER is always accessible regardless of the value of BS0-2.
Note: The bank select register can be accessed as a word at offset 0x0Eh, or as a byte at offset 0x0Fh.
BANK 7 has no internal registers other than the BANK SELECT REGISTER itself. On valid cycles where BANK7 is
selected (BS0=BS1=BS2=1), and A3=0, nCSOUT is activated to facilitate implementation of external registers.
Note: BANK7 does not exist in LAN91C9x devices. For backward S/W compatibility BANK7 accesses should be
done if the Revision Control register indicates the device is the LAN91C110.
SMSC LAN91C110 Rev. B
Page 18
DATASHEET
Revision 1.0 (11-04-08)
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