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CB55000

HCMOS7 Standard Cells

STMicroelectronics 

CB55000 Series

3 LIBRARY

The CB55000 library is organized into three categories:

– SSI cell library

– I/O cell library

– Macrofunctions

3.1 SSI Cell Library Overview

The design of the CB55000 family has been optimized to allow extremely high density, high speed and low pow-

er designs. For these reasons, a wide range of cells with different ranges of driving capabilities are available in

the library.

The library cells have been optimized in terms of functional and electrical parameters, in order to have:

– Good balancing

– Maximum speed

– Optimum threshold voltage

– Symmetric Vdd/Vss noise margins

– Minimum power-speed value

The geometrical aspect of the cells was configured to allow an extremely dense design, fully exploiting the fea-

tures of the Place and Route tool in terms of horizontal and vertical routing grids. For Place and Route, up to

six layers of metal are utilized; the first metal layer is dedicated to intracell wiring, the second layer to power

distribution and routing, the third and forth layers to routing, and the fifth and sixth to power distribution, clock

bussing and routing.

Figure 4. ND2 figure from CB55000

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